![]() ![]() Engineering the receiver for such low (pre-FEC) BERs can be interesting for low cost applications, because it alleviates the constraints on the FEC complexity while still guaranteeing error-free performance after FEC, i.e., a pre-FEC limit reduced to 3♱0 −4 makes it possible to use lower complexity KP4 FEC. 5(a)-(d) show that BER as low as 10 −4, 10 −5 and 10 −6 can even be achieved when using 3, 7 and 23-taps equalizers. Moreover, increasing the number of taps also improves BER. These results clearly show the tradeoff between receiver sensitivity, ADC bandwidth and required number of taps. ADC bandwidth can be further reduced to 18 GHz, when using 15 taps and sensitivity stabilizes between −7.3 and −7.7 dBm for all shown ADC bandwidths with a longer equalizer of 23-taps length. ![]() Increasing the equalizer length to seven taps offers 4 GHz extra ADC bandwidth reduction, and 2-2.5 dB better sensitivity. For example, with three-taps equalization the sensitivity is −5.5 dBm for a 26-GHz ADC bandwidth. ![]()
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